Question 1:
The sequence of operations is:
- A pump is switched on to fill a drum
- When partly full, a motor rotates it to stir the contents
- When full, the pump is switched off
- The motor continues to stir for a short time
- The motor is then turned off
- A valve opens to empty the drum
- All devices are switched off and the sequence is repeated.
Hire a Professional Essay & Assignment Writer for completing your Academic Assessments
Native Singapore Writers Team
- 100% Plagiarism-Free Essay
- Highest Satisfaction Rate
- Free Revision
- On-Time Delivery
Use a synchronous counter to design the above requirement.
- Design the truth Table for the above requirement using D Flip-Flop.
(Assume Logic 1 turns the device on and Logic 0 turns the device off)
(24 Marks)
(i) Determine the state and number of states. (12 Marks)
(ii) Assign state number and tabulate the state table. (6 Marks)
(iii) Tabulate state transition and excitation table for D Flip-Flops (Include unused states as x) (6 Marks) - Explain and derive the drive logic for the above application. (10 Marks)
- Implement the circuit using D Flip-Flop and draw the relevant circuit diagram to match the sequence. (6 Marks)
Question 2:
The state diagram of a sequential circuit is given as Figure 2.
- Tabulate the state diagram into related state table. (4 Marks)
b. Reduce the state table to a minimum number of states using row matching. (10 Marks)
c. Repeat (b) using an implication chart. Provide the complete steps involved in using the table. (10 Marks)
d. Draw the reduced state diagram. (6 Marks)
Buy Custom Answer of This Assessment & Raise Your Grades
Question 3:
Perform an Internet search and find the block diagram and truth table of a 4×2 Decoder. Write a VHDL code for the 2×4 Decoder (Ignore the syntax and write only the logic with relevant input and output stated). (15 Marks)
a.
(i) Draw the block diagram of the decoder. (2 Marks)
(ii) Tabulate the truth table for this decoder. (3 Marks)
(iii) Based on your truth table, use case statement to write the VHDL code. (10 Marks)
- Write the test bench for the above VHDL code. (Ignore the syntax) (10 Marks)
- Implement in a simulator to verify your code. (5 Marks)
Stuck with a lot of homework assignments and feeling stressed ? Take professional academic assistance & Get 100% Plagiarism free papers
Looking for Plagiarism free Answers for your college/ university Assignments.
- FMT306 Real Estate Investment Analysis: Canberra Crescent Land Bid & Financial Evaluation
- Corporate Finance Analysis: Business Profile, Financial Insights & Operating Cycle, Assessment 2
- ECE372 Early Childhood Learning Plan – Process Drama & Music Activities
- HSC09401/HSC09101/NUR09716 Health Promotion Strategies
- MKT371 Customer Insights and Analytics – Kimberly-Clark ECA Report
- EDS 733 The Role of Theory of Change in Addressing Social Imperatives in Education, Assignment 03
- NMQ 734/745 Interpreting Teachers’ Motivations for Remaining in the Profession
- LOG307 Optimizing Production and Facility Capacity: Linear Programming & NPV Analysis (ECA)
- HRM263 Team Effectiveness and Dynamics: Challenges, Solutions & Theoretical Insights
- BUS303 Taxation Analysis for Miss Duck Hollow: Assessable Income, Deductions & Depreciation