PSB5045EE ADE2 Assignment Questions Nov Sem 2024, Singapore

Assignment – Question Paper

Answer: All 3 Questions.

Total 100 marks

Instructions:

• This main page must be included as the first page in your submission.
• Start each question on a new page and carefully identify your answers with the correct question number.
• Write your student ID and page number on every page of your answer.
• Upload your solutions in a single PDF file into the PSB LMS system.

Question 1 (40 Marks)

In an industrial plant, a liquid is added to a drum and then stirred. After sufficient time, the drum is emptied. The sequence of operations is:

• A pump is switched on to fill a drum
• When partly full, a motor rotates it to stir the contents
• When full, the pump is switched off
• The motor continues to stir for a short time
• The motor is then turned off
• A valve opens to empty the drum
• All devices are switched off and the sequence is repeated.

Use a synchronous counter to design the above requirement.

a. Design the truth Table for the above requirement using D Flip flop. (Assume Logic 1 turns the device on and logic 0 turns the device off) (24 Marks)

(i) Determine the state and number of states. (12 marks)

(ii) Assign state number and tabulate the state table. (6 marks)

(iii) Tabulate state transition and excitation table for D flip-flops. (Include unused states as x) (6 marks)

b. Explain and derive the drive logic for the above application. (10 Marks)

c. Implement the circuit using D Flip flop and draw the relevant circuit diagram to match the sequence (6 Marks)

Question 2 (30 Marks)

The state diagram of a sequential circuit is given as Figure 2.

a. Tabulate the state diagram into related state table. (4 Marks)

b. Reduce the state table to a minimum number of states using row matching. (10 Marks)

c. Repeat b) using an implication chart. Please provide the complete steps involved in using the table. (10 Marks)

d. Draw the reduced state diagram. (6 Marks)

Question 3 (30 Marks)

a. Perform an Internet search and find the block diagram and truth table of 4×2 Decoder. Write a VHDL code for the 2 X 4 Decoder (Ignore the syntax and write only the Logic with relevant input and output stated). (15 Marks)

(i) Draw the block diagram of the decoder. (2 marks)

(ii) Tabulate the truth table for this decoder (3 marks)

(iii) Based on your truth table, use case statement to write the VHDL code. (10 marks)

b. Write the test bench for the above VHDL code. (Ignore the syntax). (10 Marks)

c. Implement in a simulator to verify your code. (5 Marks)